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Strained silicon and HKMG take the stage at 22nm

Mohith Verghese, ASM America, covers the gate stack changes expected when 22nm semiconductors ramp in volume production. Topics include high-k gate dielectrics, strained silicon including nMOS strain, and the importance of conformal deposition wafer processing technology.

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22nm requires foundry-to-packaging-house cooperation

At the 22nm node, die fragility and challenging interconnect materials will necessitate foundry collaborations with packaging houses, co-designing silicon and package, asserts E. Jan Vardaman, TechSearch International.

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Mask-wafer double simulation: A new lithography requirement at 22nm

Accurate mask-wafer double simulation is a new, required step for lithography at the 20nm node and beyond because corner rounding becomes the dominant effect, explains Aki Fujimura, D2S.

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IEST cleanroom apparel doc update includes measurement guide

The updated "Garment System Considerations for Cleanrooms and Other Controlled Environments" document includes new sections on measuring footwear, frocks and other garments, as well as a new subsection for tracking system use, such as RFID chips and barcodes.

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At 22nm, the focus is first order effects

Regardless of transistor architecture, the impact of process variability on device and circuit performance has emerged as a significant concern at 22nm. Effects that until recently were negligible or could be mitigated with improved wafer manufacturing control are now first-order effects, says Howard Ko, Synopsys, who outlines the main culprits.

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At 22nm, leave chip layout to the experts

The transition to 22nm silicon will have a major impact on the design community, most notably in process variation: timing and power. Because of this, we are seeing a dramatic increase in the 22nm process design rules, says Gary Smith. More and more design teams will decide to leave the IC layout portion of the design to the experts.

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Semiconductor IPOs and M&As in November 2011

The Global Semiconductor Alliance (GSA) released its Global Semiconductor Funding, IPO and M&A Update, showing that initial public offerings surged in November, with 3 companies entering the stock market.

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Semiconductor process technology challenges at 22nm

2012 promises much for the semiconductor industry, and the world. Gartner’s Dean Freeman analyzes the roles of semiconductor fab tool makers for 22nm NAND and logic device manufacturing, and the role of chip makers adopting the new node.

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Docomo establishes fabless semiconductor JV with NEC, Panasonic, Samsung, Fujitsu and Fujitsu Semiconductor

The fabless JV will develop feature-rich, small-size, low-power-consumption semiconductor products equipped with modem functionality. It will be focused on LTE and LTE-Advanced mobile communication standards products, sold globally.

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Intel sees Atom chip sales decline, maintains microprocessor lead in Q3

Intel’s Atom chips saw plunging sales as the netbook market was swallowed by smartphones, media tablets, and like devices, but the company expanded its microprocessor leadership in Q3 2011, shows IHS iSuppli.

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