IBM Research today announced that working with alliance partners at SUNY Polytechnic Institute’s Colleges of Nanoscale Science and Engineering (SUNY Poly CNSE) it has produced the semiconductor industry’s first 7nm (nanometer) node test chips with functional transistors. The breakthrough underscores IBM’s continued leadership and long-term commitment to semiconductor technology research.
The accomplishment, made possible through IBM’s unique public-private partnership with New York State and joint development alliance with GLOBALFOUNDRIES, Samsung and equipment suppliers, is driven by the company’s $3 billion, five-year investment in chip R&D announced in 2014. Under that program, IBM researchers based at SUNY Poly’s NanoTech Complex in Albany are pushing the limits of chip technology to 7nm node and beyond to meet the demands of cloud computing and Big Data systems, cognitive computing and mobile products.
Developing a viable 7nm node technology has been one of the grand challenges of the semiconductor industry. Pursuing such small dimensions through conventional processes has degraded chip performance and negated the expected benefits of scaling — higher performance, less cost and lower power requirements. Microprocessors utilizing 22nm and 14nm technology power today’s servers, cloud data centers and mobile devices, and 10nm technology is well on the way to becoming a mature technology, but 7nm node has remained out of reach due to a number of fundamental technology barriers. In fact, many have questioned whether the traditional benefits of such small chip dimensions could ever be achieved.
The IBM 7nm node test chip with functioning transistors was achieved using new semiconductor processes and techniques pioneered by IBM Research. Developing it required a number of first-in-the-industry innovations, most notably silicon germanium (SiGe) channel transistors and extreme ultraviolet (EUV) lithography integration at multiple levels.
By introducing SiGe channel material for transistor performance enhancement at 7nm node geometries, process innovations to stack them below 30nm pitch and full integration of EUV lithography at multiple levels, IBM was able to achieve close to 50 percent area scaling improvements over today’s most advanced 10nm technology. These efforts could result in at least a 50 percent power/performance improvement for the next generation of systems that will power the Big Data, cloud and mobile era.
The 7nm node milestone continues IBM’s legacy of historic contributions to silicon and semiconductor innovation. They include the invention or first implementation of the single cell DRAM, the Dennard Scaling Laws, chemically amplified photoresists, copper interconnect wiring, Silicon on Insulator, strained engineering, multi core microprocessors, immersion lithography, high speed SiGe, High-k gate dielectrics, embedded DRAM, 3D chip stacking and Air gap insulators.
IBM and SUNY Poly have built a highly successful, globally recognized partnership at the multi-billion dollar Albany NanoTech Complex, highlighted by the institution’s Center for Semiconductor Research (CSR), a $500 million program that also includes the world’s leading nanoelectronics companies. The CSR is a long-term, multi-phase, joint R&D cooperative program on future computer chip technology. It continues to provide student scholarships and fellowships at the university to help prepare the next generation of nanotechnology scientists, researchers and engineers.