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ISS kicks off with IC industry reality talks

January 16, 2012 — With an official registration of 261 attendees, more than double 2011, the 2012 Industry Strategy Symposium (ISS 2012) kicked off today for semiconductor industry professionals at the Ritz-Carlton, Half Moon Bay, CA under blustery skies with choppy seas.

The opening keynote address was delivered by William Holt, Senior VP & GM of Intel’s Technology & Manufacturing Group. For those of us who missed it, last year was the 40th anniversary of the introduction of Intel’s 4004 processor, a 10µm technology with 2,300 transistors built on 50mm wafers. The number of transistors in use has increased 15x in the last five years, and will increase again 15x in the next 5 years. Bill’s view is that traditional scaling arguably ended with 130nm; since then, we have engaged in numerous materials, process and design innovations that have resulted in the necessary improvements in device performance. Some but not all of these have included geometric (i.e. traditional) scaling. For all of the advancement that has taken place over the past 40 years, his conclusion is that we are only at the beginning of opportunity.

Duncan Meldrum, Senior Director at IHS, opened the geo-economic trends session with a quick review of his ISS outlook from two years ago. In short, little has changed. The outlook is bleak, although some improvement is expected following the November 2012 US elections because the level of policy uncertainty will decrease. If we can continue to grow jobs, “there’s a chance we can muddle through.” Business & consumer demand for tech products is still declining, resulting in a weak MSI (millions of square inches) forecast for silicon, shown below.

Figure 1. Semiconductor outlook from IHS Center for Forecasting and Modeling. Demand-driven model-based projection: Weak growth.

The audience attended to his words in depressed silence while the hotel staff quietly removed sharp objects from the tables.

David Townes, Managing Director of Needham, may have pushed some folks over the edge by opening his talk with word that his long term view is that equities have been immersed in a fantasy valuation that is destined to collapse. Since 1995, semi cap equipment companies have increased 32% in value. Adjusted for inflation, they have declined 44%. There have been no sector IPOs since Nextest and Eagle Test in 2006. Only three small companies today are presenting a healthy financial picture: Jordan Valley, Nexx and Intermolecular (though not a semi cap business, Intermolecular represents an innovative business model for R&D). The economic metrics for government liabilities are pointing inescapably to default. The Bureau of Labor Statistics reports an inflation rate of 3% as a result of revised methods for reporting such data. David says the more realistic number is 8%. His outlook for the next ten years for real capital value appreciation is that it is very much at risk. Recommendation: own real things and maintain high liquidity. Don’t assume that cash is safe, because its source may not be sound.

Robert Fry, Senior Economist at DuPont, found a bright spot with an increase in US automobile sales. Much of 2011 growth was below the trend line, and US GDP growth will be just barely positive at only 2% in 2012. The TED Spread (look it up…) fluctuated wildly from 2007 to 2009, then settled down to about 20 basis points, which is a good indicator of market stability. Lately it’s been creeping up to 57 basis points, possibly portending a stealth financial crisis in the making. Economist humor: the underperforming portion of the European economy is referred to as the PIIGS (Portugal, Italy, Ireland, Greece, Spain). Yes, it’s pronounced “pigs.” US feedstock chemicals are largely made from natural gas. Europe and the rest of the world depend more on oil, placing US suppliers at a long term net advantage. The current outlook is for recession in Europe, with slow growth everywhere else — but recession risks remain elevated globally. According to Reinhart and Rogoff (authors mentioned by all three of the speakers on the economy), growth slows significantly when a country’s government debt exceeds 90% of GDP. We are there.

Steve Newberry, Vice Chairman of Lam,  tried to lighten things up by shifting topics to the semiconductor industry itself. Really? Chip fabs are more profitable today than in 2007, but most of that profit resides in the top 5 companies. Among foundries, only TSMC has a healthy cost structure. A viable foundry strategy is to operate in trailing edge technologies (N-1 to N-3 nodes) rather than compete at the leading/bleeding edge. NAND profitability is good among the 4 key suppliers; DRAM is not so healthy, with significant restructuring among suppliers and alliances. The auto industry has been running at ~5% profitability for the past 40 years. That industry pays 65% of the R&D costs in close connection with their suppliers, who pay the balance. This close relationship results in a more efficient use of R&D funds, with less wasted on designs that won’t be used. The learning opportunity for the semiconductor industry is clear. Early indications are that the industry R&D investment model is significantly more robust at the 450mm precipice than it was during the 300mm transition, but there remains a lot of room for improvement.

Figure 2. Foundry profitable: Profile remains the same and problematic. Only one of the foundries continues to sustainably fund capex purely through cash from operations. Technology leader has maintained dominance; other foundries continue to be profit-challenged despite declining depreciation. Source: Lam Research

Bernie Meyerson, IBM’s VP of Innovation and Global University Relations, returned to ISS to define the future of semiconductors. The industry is officially in the end game: for five decades, we have been “turning the small knob” of device shrinkage and it has broken off. Advancement is not about manufacturing; it’s about science fundamentals. A good portion of innovation will come from low dimension carbon structures (graphene, CNT). Less than a week before this presentation, IBM demonstrated a sub-10nm CNTFET with good device parameters. A 40nm epitaxial graphene RF FET showed a cutoff frequency of 280 GHz. Another limiting parameter has become the speed of light: during a single machine cycle, light travels about the length of the last segment of your little finger, making this a rule of pinkie rather than a rule of thumb. Integration of logic, memory and optics is required for successful 3D innovation, in large part to reduce the amount of heat generated by the chip I/O alone. The end game for magnetic storage has been demonstrated with work showing that a 12 atom memory cell is the smallest possible; any fewer, and stability gives way to quantum effects. Racetrack designs using 60nm wires on a 90nm CMOS driver were demonstrated as manufacturable only last month at IEDM 2011. This uses largely conventional technology to improve storage density significantly. It’s no accident that Bernie’s job includes university relations; innovations come from innovators, not from corporations, even if corporations are people. Innovators come from cross-disciplinary university programs focused on science fundamentals that lead to industry relevant breakthroughs.

Figure 3. 3D integration of logic, memory, and optics. 3D integration allows restructuring of the compute node to leverage dense memory and dramatically increase memory bandwidth. This produces significant performance improvements with necessary software co-evolution/adaptation. SOURCE: IBM.

Bill McLean of IC Insights talked about the IC industry outlook in the aforementioned uncertain economy. The semiconductor business grew ~2% in 2011. However, if you take out DRAM, the remaining 90% of the industry grew 6%. The “new normal” for capital equipment spending as a percent of semi sales is 15%, down from 19%. The top 10 fabs control 84% of the 300mm market capacity. China represents the last group of newcomers to the chip manufacturing business, resulting in a closed loop system for suppliers seeking new entry points.

Figure 4. Semiconductor capital spending as a percent of semiconductor sales. SOURCE: IC Insights.

Prof. S. Massoud Amin, Director of the Technological Leadership Institute at the University of Minnesota, switched gears with a discussion of opportunities in smart grids. The North American power grid is the largest single machine on the planet. It comprises over 450,000 miles of 100 KV or higher transmission lines. The efficiency of delivering power from a coal-fired plant to a home light bulb is 1.6%. A single Tweet takes only 0.025 watt-hour of energy, but since there are a billion tweets per week, the consumption is 2,500 MWh, the total output of two nuclear power plants. The control demands for a stable grid require time management for events over 10 orders of magnitude. Large opportunities for semiconductors are found in the transceiver chip set in electric cars, building energy management systems, and other elements of smart grid implementation. Global expenditure for smart grids is expected to run $17B-24B/year for the next 20 years, with a net benefit to the US economy of $2.3T.

Figure 5a. 10-years long-term market forecast for SiC devices in various power applications (Sensors on silicon, MCUs in everything, heat-tolerant semiconductors, power management, solar, energy harvesting).
Figure 5b. World market for semiconductors in electric vehicle (EV) powertrains.

Jim Koonmen, SVP & GM of Brion at ASML, brought us closer to home with the industrialization of new lithographic technologies. From a litho perspective, the “small knob” is not broken; device shrink is still a driver. Single exposure EUV will extend below 20nm, with double exposure EUV necessary to get to 8nm. Rule-based SRAF placement in computational lithography is giving way to model-based SRAFs. Six NXE:3100 EUV tools have been shipped, four to development groups in production fabs. IMEC has successfully demonstrated 16nm lines/spaces. Dedicated chuck overlay has been certified at <1nm; 1nm is about 4 silicon atoms. The NXE:3300B will ship by YE12 with a throughput of 69wph, N.A. 0.33 and 3/5nm overlay DCO/MMO. Each scanner is built in its own dedicated cleanroom; ASML is planning on 23 of these. Optical source power is presently at 10W and is projected to achieve 20W this year. The production need is for 125-250W. The transition to 450mm needs to take place across all litho platforms concurrently in order to support fabrication capability at the larger wafer size.

Figure 6. Two options for shrink: Immersion and EUV lithography. SOURCE: ASML.

Shawn DuBravac, Chief Economist and Director of Research at CEA, reported on the January 2012 CES in Las Vegas. New notebooks are touting battery life, usability and design features rather than traditional metrics such as processor speed and storage capacity. Quad-core smart phones have appeared. Interconnectivity rather than compute power will be the next big drive in computing devices. TV remotes now include MEMS and audio computation for gesture and voice control. Many innovation concepts began as gaming elements for market introduction; this provided for technology debug while creating a market appetite for more serious applications as consumers became more comfortable with them. Motion gesturing and remote sensing are examples. MEMS and other sensor technology has reached a price point at which it can be widely integrated into a variety of devices at many price points. Best anecdote: a smart phone app has been developed that monitors your pulse rate and blood pressure. You can then scan your smart phone over your Outlook calendar to ascertain which meetings cause you the greatest stress.

Michael A. Fury, Ph.D, is senior technology analyst at Techcet Group, LLC, P.O. Box 29, Del Mar, CA 92014; e-mail mfury@techcet.com.

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